High Performance Embedded Architectures and Compilers
It is a pleasure for us to introduce the proceedings of the second edition of theInternationalConferenceonHigh-PerformanceEmbeddedArchitecturesand Compilers (HiPEAC 2007). This conference ?lls a gap in that it focuses on how to meet the challenging performance requirements of future embedded systems through a concerted e?ort at both sides of the hardware/software interface. As a result, this year’s edition coveredtopic areasspanning from low-power,secure, and adaptive architectures via evaluation tools/methods to compiler optimi- tiontechniques.TheprogramalsofeaturedakeynotepresentationbyTomConte of North Carolina State University. This year we received 65 submissions of which 9 papers were committee - pers.Papersweresubmitted from15di?erent nations (about40 % fromEurope, 30% from Asia, and 30% from North America), which is a token of the global visibility of the conference. We had the luxury of having a strong Program Committee consisting of 34 experts in all areas within the scope of the conference and we kept all reviewing withintheProgramCommittee.Thus,eachpaperwastypicallyreviewedbyfour Program Committee members. We collected 258 reviews and we were happy to note that each paper was rigorously reviewed before any decisions were made, despite the fact that we shortened the review phase and that reviewing took place during most reviewers’ precious vacation time.