Model Reduction for Circuit Simulation
Simulation based on mathematical models plays a major role in computer aided design of integrated circuits (ICs). Decreasing structure sizes, increasing packing densities and driving frequencies require the use of refined mathematical models, and to take into account secondary, parasitic effects. This leads to very high dimensional problems which nowadays require simulation times too large for the short time-to-market demands in industry. Modern Model Order Reduction (MOR) techniques present a way out of this dilemma in providing surrogate models which keep the main characteristics of the device while requiring a significantly lower simulation time than the full model.
With Model Reduction for Circuit Simulation we survey the state of the art in the challenging research field of MOR for ICs, and also address its future research directions. Special emphasis is taken on aspects stemming from miniturisations to the nano scale. Contributions cover complexity reduction using e.g., balanced truncation, Krylov-techniques or POD approaches. For semiconductor applications a focus is on generalising current techniques to differential-algebraic equations, on including design parameters, on preserving stability, and on including nonlinearity by means of piecewise linearisations along solution trajectories (TPWL) and interpolation techniques for nonlinear parts. Furthermore the influence of interconnects and power grids on the physical properties of the device is considered, and also top-down system design approaches in which detailed block descriptions are combined with behavioral models. Further topics consider MOR and the combination of approaches from optimisation and statistics, and the inclusion of PDE models with emphasis on MOR for the resulting partial differential algebraic systems. The methods which currently are being developed have also relevance in other application areas such as mechanical multibody systems, and systems arising in chemistry and to biology.
The current number of books in the area of MOR for ICs is very limited, so that this volume helps to fill a gap in providing the state of the art material, and to stimulate further research in this area of MOR. Model Reduction for Circuit Simulation also reflects and documents the vivid interaction between three active research projects in this area, namely the EU-Marie Curie Action ToK project O-MOORE-NICE (members in Belgium, The Netherlands and Germany), the EU-Marie Curie Action RTN-project COMSON (members in The Netherlands, Italy, Germany, and Romania), and the German federal project System reduction in nano-electronics (SyreNe).
Future direction in MOR for circuit simulations Aspects of MOR related to miniaturization to nano-scale